A media access control layer (MAC) may include a serial interface for interfacing to the physical layer (PHY) circuitry of a network interface card (NIC) or other networking components. In computer network systems, there is typically a natural division between chips handling the physical layer, which is responsible for transmitting data on the network, and the system chips, which perform logical operations with data transmitted on the network. Ethernet hubs, routers, and switches typically include multiple ports and may be referred to as multi-port Ethernet devices. Each port typically includes a system chip, which includes an MAC and a PHY. Modern multi-port Ethernet devices typically integrate multiple MACs into one system chip (MAC chip) as well as multiple PHYs into another chip (PHY chip). An interface may be needed on each chip to transfer signals between the MACs and the PHYs.
Institute of Electrical and Electronics Engineers (IEEE) Standard 802.3u defines a media-independent interface (MII) between an MAC and a PHY that includes 16 pins used for data and control. As noted above, in devices that include multiple ports that each have an MAC and a PHY, it is common to implement multiple MACs on one chip and multiple PHYs on another chip. If the standard MII, which includes 16 pins for data and control, is used for each MAC and PHY on the MAC chip and the PHY chip, the number of pins required for each chip becomes large as multiple MACs and PHYs are included on single chips.